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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]Re: tlug: cacheable memory
- To: tlug@example.com
- Subject: Re: tlug: cacheable memory
- From: Jim Tittsler <jwt-tlug@example.com>
- Date: Fri, 22 Oct 1999 22:46:22 +0900
- Content-Type: text/plain; charset=us-ascii
- In-Reply-To: <199910221051.TAA14107@example.com>; from Yong-Ming Hua on Fri, Oct 22, 1999 at 07:54:42PM +0900
- Organization: 7J1AJH/AI8A Tokyo
- References: <19991022182144.D4239@example.com> <199910221051.TAA14107@example.com>
- Reply-To: tlug@example.com
- Sender: owner-tlug@example.com
On Fri, Oct 22, 1999 at 07:54:42PM +0900, Yong-Ming Hua wrote: > But when I carefully read the first boot up message, it says > something like memory=64MB....(obviously nullifying the 32MB!!!). > So I want to use that 32MB, or any memory above 64MB. hmmmmmmmm > I put mem=96MB to boot up, but the ol'girl doesn't accept it.... I use "mem=128M" successfully. Jim P.S. There were some motherboard chipsets that could only cache the first 64MB of RAM, but that didn't prevent you from using the rest... it just wouldn't be cacheable. -- Jim Tittsler, Tokyo ICQ: 5981586 ------------------------------------------------------------------- TLUG Akihabara Tour: October 23 (Sat), 13:00 Shosen Book Tower 2F Next Technical Meeting: November 13 (Sat), 13:30 place: Temple Univ. * Network Security speaker: Steve Baur Next Nomikai: December 17 (Fri), 19:00 Tengu TokyoEkiMae 03-3275-3691 ------------------------------------------------------------------- more info: http://www.tlug.gr.jp Sponsor: Global Online Japan
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- References:
- Re: tlug: To set the record straight.
- From: Jonathan Byrne <jq@example.com>
- Re: tlug: To set the record straight.
- From: Yong-Ming Hua <yhua@example.com>
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